A self-reconfiguring cache architecture to improve control quality in cyber-physical systems

Keyphrases

• Cache Architecture 100%
• Self-configuration 100%
• Conflict Misses 66%
• Associativity 50%
• Cache Memory 33%
• Cache Coherence 33%
• Reconfigurable Cache 33%
• Replacement Policy 16%
• Execution Energy 16%
• Modular Reconfiguration 16%
• Memory Architecture 16%
• Runtime Improvement 16%
• Cache Hierarchy 16%
• Inclusive Cache 16%
• Execution Time 16%
• Processor Caches 16%
• Low Overhead 16%
• Run-to-run Control 16%
• Quality Demands 16%
• Cache Line 16%
• Timing Behavior 16%
• Trace-driven Simulation 16%
• Indexing Scheme 16%

Computer Science

• Associativity 100%
• Conflict Miss 80%
• Cache Memory 40%
• Reconfiguration 40%
• Timing Behavior 20%
• Time Consumption 20%
• Reduce Conflict 20%
• Cache Hierarchy 20%
• Runtime Modification 20%
• Memory Architecture 20%
• Processor Cache 20%
• Execution Time 20%
• Replacement Policy 20%