Efficient Ternary Logic Circuits Optimized by Ternary Arithmetic Algorithms

Keyphrases

• Arithmetic Algorithms 100%
• Ternary Arithmetic 100%
• Multivalued Logic Circuits 66%
• CMOS Fabrication 33%
• Logical Systems 33%
• Wallace Tree multiplier 33%
• Product Improvement 33%
• Standard CMOS Technology 33%
• Propagation Delay 33%
• Ternary multiplier 33%
• Truth Table 33%
• Arithmetic Logic 33%
• Binary Logic 33%

Computer Science

• Arithmetic Algorithm 100%
• Truth Table 33%
• Propagation Delay 33%
• Arithmetic Circuit 33%

Engineering

• Silicon Device 20%
• Arithmetic Circuit 20%
• Propagation Delay 20%
• Binary Logic 20%