Abstract
Nanoelectronics applications will face limits imposed by physics laws, material properties, circuits and systems characteristics, assembly conditions and many other challenges for achieving Moore and more than Moore Predictions. In this context, packaging is a major problem and will play a crucial role for enabling future nanoelectronics. In this context, Carbon nanotubes (CNTs) are a good candidate for RF interconnects, having better electrical as well as high frequency performance as compared to the conventional metals. In this study, CNTs are considered for high frequency interconnects based on flip-chip bounding. In order to help component design, a modeling approach based on circuit simulation is proposed. Several experimental works will be presented such as flip-chip report based on CNTs bumps and future work.
Original language | English |
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Title of host publication | 2014 IEEE International Nanoelectronics Conference, INEC 2014 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
ISBN (Electronic) | 9781479950379 |
DOIs | |
Publication status | Published - Apr 26 2016 |
Externally published | Yes |
Event | IEEE International Nanoelectronics Conference, INEC 2014 - Sapporo, Japan Duration: Jul 28 2014 → Jul 31 2014 |
Publication series
Name | 2014 IEEE International Nanoelectronics Conference, INEC 2014 |
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Conference
Conference | IEEE International Nanoelectronics Conference, INEC 2014 |
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Country/Territory | Japan |
City | Sapporo |
Period | 7/28/14 → 7/31/14 |
Bibliographical note
Publisher Copyright:© 2014 IEEE.
ASJC Scopus Subject Areas
- Electrical and Electronic Engineering
Keywords
- Carbon nanotubes
- Flip-chip bonding
- Hybrid modeling
- nanopackaging
- Nanotechnology
- RF interconnects