DC & transient circuit simulation methodologies for organic electronics

Ramesh R. Navan, Rajesh A. Thakker, S. P. Tiwari, M. Shojaei Baghini, M. B. Patil, S. G. Mhaisalkar, V. Ramgopal Rao

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

This work establishes a novel circuit simulation methodology for organic thin film transistors (OTFTs). Because of a lack of well developed physical models for OTFTs and due to the limitations of conventional parameter extraction techniques, the approaches presented in this work come in handy for circuit designers. The first approach uses a Look-up Table (LUT) model, which is implemented in a general purpose public-domain circuit simulator SEQUEL (Solver for circuit EQuations with User-defined Elements). In the second approach, circuit simulation is performed using equivalent SPICE parameters, which are extracted using a global optimization technique namely particle swarm optimization (PSO) algorithm. A good match has been observed between LUT simulations and SPICE based circuit simulations for both DC and transient cases.

Original languageEnglish
Title of host publication2009 2nd International Workshop on Electron Devices and Semiconductor Technology, IEDST '09
DOIs
Publication statusPublished - 2009
Externally publishedYes
Event2009 2nd International Workshop on Electron Devices and Semiconductor Technology, IEDST '09 - Mumbai, India
Duration: Jun 1 2009Jun 2 2009

Publication series

Name2009 2nd International Workshop on Electron Devices and Semiconductor Technology, IEDST '09

Conference

Conference2009 2nd International Workshop on Electron Devices and Semiconductor Technology, IEDST '09
Country/TerritoryIndia
CityMumbai
Period6/1/096/2/09

ASJC Scopus Subject Areas

  • Electrical and Electronic Engineering

Keywords

  • Look-up table (LUT)
  • Organic thin film transistor (OTFT)
  • Particle swarm optimization (PSO)
  • SEQUEL

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