Demonstration of Schottky barrier NMOS transistors with erbium silicided source/drain and silicon nanowire channel

Eu Jin Tan*, Kin Leong Pey, Navab Singh, Guo Qiang Lo, Dong Zhi Chi, Yoke King Chin, Keat Mun Hoe, Guangda Cui, Pooi See Lee

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

22 Citations (Scopus)

Abstract

We have fabricated silicon nanowire N-MOSFETs using erbium disilicide ErSi2-x in a Schottky source/drain back-gated architecture. Although the subthreshold swing (∼180 mV/dec) and drain-induced barrier lowering (∼500 mV/V) are high due thick BOX as gate oxide, the fabricated Schottky transistors show acceptable drive current ∼900 μA/m and high IonI/off ratio ∼105. This is attributed to the improved carrier injection as a result of low Schottky barrier height (Phib) ErSi2-x/n - Si(∼0.3 eV) and the nanometer-sized (∼8 nm) Schottky junction. The carrier transport is found to be dominated by the metal-semiconductor interface instead of the channel body speculated from the channel length independent behavior of the devices. Furthermore, the transistors exhibit ambipolar characteristics, which are modeled using thermionic/thermionic-field emission for positive and thermionic-field emission for negative gate biases.

Original languageEnglish
Pages (from-to)1167-1170
Number of pages4
JournalIEEE Electron Device Letters
Volume29
Issue number10
DOIs
Publication statusPublished - 2008
Externally publishedYes

ASJC Scopus Subject Areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Keywords

  • Erbium silicide
  • Schottky source/drain (S/D) MOSFET (SSDMOS)
  • Silicon nanowire (SiNW)

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