Abstract
In this paper, we present a new error-correction scheme, referred to as embedded marker code scheme (EMCS), for channels corrupted by insertions, deletions and additive white Gaussian noise (AWGN). The EMCS uses the pinning bits, which have the potential to lower the error floors of the outer low-density parity-check (LDPC) codes, for both resynchronization and improving error-correction performance. Furthermore, the soft-input synchronization for the inner decoder and the joint iterative decoding between the inner decoder and the outer decoder is employed to further improve the overall performance of the new scheme. Simulations show that the proposed EMCS reduces the code rate loss as compared with the conventional marker code scheme and achieves a better tradeoff between the error performance and the decoding complexity. Therefore, the new scheme can reduce code rate loss and improve storage efficiency when it is used in bit-patterned media recording (BPMR) systems.
Original language | English |
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Article number | 6522282 |
Pages (from-to) | 2535-2538 |
Number of pages | 4 |
Journal | IEEE Transactions on Magnetics |
Volume | 49 |
Issue number | 6 |
DOIs | |
Publication status | Published - 2013 |
Externally published | Yes |
ASJC Scopus Subject Areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering
Keywords
- Bit-patterned media recording (BPMR)
- insertion/deletion
- low-density parity-check (LDPC) codes
- marker code
- synchronization errors