Source-Constrained Hierarchical Modulation Systems with Protograph LDPC Codes: A Promising Transceiver Design for Future 6G-Enabled IoT

This work studies the transceiver design and convergence performance analysis for the hierarchical modulation (HM) systems with protograph-based low-density parity-check (P-LDPC) codes. Specifically, we first conceive new source-constrained (SC) coding scheme and inter-layer-cascaded (ILC) decoding scheme tailored for the HM-based transmitter and receiver, respectively. Both the proposed SC coding and ILC decoding schemes form an enhanced version of bit-interleaved-coded HM (BIC-HM) systems, namely source-constrained HM (SC-HM) systems, providing a more reliable and flexible multi-data transmission solution. Moreover, according to the SC coding principle, we conceive a novel variable-node-degree-based (VND) multiplexing scheme to further improve the performance of the proposed SC-HM systems. Additionally, based on the ILC decoding framework, we devise a novel mutual information (MI) analysis tool, namely ILC-based extrinsic-information-transfer (ILC-EXIT) algorithm, to predict the decoding thresholds of the proposed P-LDPC-coded SC-HM systems. Theoretical and simulation results demonstrate that the proposed SC-HM systems significantly outperform the existing benchmarks in terms of error performance, decoding latency, and transmission-rate adaptation.