Voltage-balance limits in four-level diode-clamped converters with passive front ends

Josep Pou*, Rafael Pindado, Dushan Boroyevich

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

272 Citations (Scopus)

Abstract

Multilevel diode-clamped converters with more than three levels cannot maintain voltage balance in the dc-link capacitors for some operating conditions due to the existence of dc currents in the middle points. Since capacitors are either completely charged or discharged for those conditions, this circumstance severely limits practical application of these converters. The limit explored in this paper is that the four-level converter cannot achieve voltage balance. Proper redundant vectors are selected in the space-vector diagram so that a quadratic parameter related to the currents in the middle points is minimized.

Original languageEnglish
Pages (from-to)190-196
Number of pages7
JournalIEEE Transactions on Industrial Electronics
Volume52
Issue number1
DOIs
Publication statusPublished - Feb 2005
Externally publishedYes

ASJC Scopus Subject Areas

  • Control and Systems Engineering
  • Electrical and Electronic Engineering

Keywords

  • Four-level inverter
  • Multilevel inverter
  • Nearest vectors
  • Passive front ends
  • Space-vector modulation (SVM)
  • Voltage balance

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